Dec 13

Toshiba Develops Promising Technologies for 32nm Generation System LSIs and Beyond

Tag: 32nm, Japan, Nanotech, TechLuver, ToshibaJack @ 6:40 AM

Toshiba Develops Promising Technologies for 32nm Generation System LSIs and BeyondTOKYO, Japan — Dec 13, ‘07 — Toshiba today announced that it has achieved breakthroughs in three major basic technologies for 32nm generation system LSIs and beyond.

The advances are a major advance in metal gate electrode; a new structure and process technology for low resistance contacts that reduce contact resistance; and a technology for improving performance by changing the surface orientation of the silicon substrate. The new breakthrough will pave the way to 32nm LSIs and improve process efficiencies.

The three technologies were introduced at the IEDM (International Electron Devices Meeting) conference held at Washington DC, as major candidates for basic technologies for use in 32nm generation system LSIs and beyond. Toshiba will continue their development and optimization and aim for mass production in the first half of FY2010.

In developing the improved, new metal gate, Toshiba has realized a simplified manufacturing process technology that employs nickel silicide, a common material for both nMOS and pMOS transistors in a ratio of 1:3, respectively, and introduces an aluminum layer only in the nMOS gate.

For the low resistance contact, Toshiba employed a metal material in the source/ drain region, reducing contact resistance to a quarter in the nMOS side. The base electrode material is the same for both the nMOS and pMOS in pairs, and low-Schottky-barrier metal suitable for each type MOS transistor is segregated at interface of base material. The manufacturing process is simplified.

System LSI integrates CMOS elements, nMOS transistors and pMOS transistors. Therefore an optimized process is required. These new two technologies enhance performance and also contribute to an efficient manufacturing process. More at Toshiba.

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